IEEE CASS
Sapporo Workshop on Circuits and Systems
IEEE CASS Sapporo Workshop on Circuits and Systems (Sapporo-CAS) will be held on July 30 - August 1, 2023, in Hokkaido University, Sapporo, Japan. The objectives of this workshop are to provide a forum for exchange on the latest results related to circuits and systems and to enhance and/or develop various levels of cooperation. Papers describing original works in all aspects of circuits and systems are invited. Sapporo-CAS welcomes all researchers including students to present their latest researches on circuits and systems.
Workshop Date
July 30 - August 1, 2023
Organizers
Sponsored by
IEEE CAS Society
IEEE Sapporo Section
Laboratory of Information Communication Networks, Hokkaido University
Co-Sponsored by
IEEE Sapporo Section LMAG
IEEE Sapporo Section WIE
IEEE Hokkaido University SB
IEEE Muroran Institute of Technology SB
IEEE CASS Japan-Joint Chapter
IEEE CASS Shikoku Chapter
IEEE CASS Seoul Chapter
IEEE CASS Daegu Chapter
IEEE CASS Daejeon Chapter
Venue
Meeting Room 5F, Information Sci-Tech Building, Hokkaido University,
Sapporo, Japan.
Program
July 30 (sun)
14:00-16:15 Organizing Committee Meeting18:00-20:00 Welcome Dinner
July 31 (mon)
10:00-11:30 Executive Committee Meeting13:30-14:00 Opening Ceremony
Prof. Yoshifumi Nishio (Tokushima University, Japan)
14:00-15:15 Invited Talks I
"Deep Learning Techniques can Help Diagnose Disease"
Prof. Myung Hoon Sunwoo (Ajou University, Korea)
"A 24.1 TOPS per W Mixed-Signal BNN Processor with On-Chip SRAM in 28-nm CMOS"
Prof. Jinwook Burm (Sogang University, Korea)
"Conflict of Hierarchical Networks of Chaotic Circuits"
Prof. Yoshifumi Nishio (Tokushima University, Japan)
"High-Performance Architecture Design for Homomorphic Encryption"
Prof. Hanho Lee (Inha University, Korea)
"A 2.5 GHz 57.35 dBc SFDR Non-linear DAC-based Direct-Digital Frequency Synthesizer"
Prof. Kwang Hyun Baek (Chung-Ang University, Korea)
15:30-16:45 Invited Talks II
"Low-Power AI-Hardware Design for Edge Devices"
Prof. Kyung Ki Kim (Daegu University, Korea)
"Recent Advances in FPGA Reverse Engineering"
Prof. Youngmin Kim (Hongik University, Korea)
"Investigating Packet Transmission from the Perspective of Synchronization of Chaotic Circuits Networks"
Prof. Yoko Uwate (Tokushima University, Japan)
"A Frequency-Splitting-Based Wireless Power and Data Transfer IC for Neural Prostheses with Simultaneous 115mW Power and 2.5Mb/s Forward Data Delivery"
Prof. Minkyu Je (KAIST, Korea)
"AI-based Electrical Design Automation: Design Prediction, Exploration and Generation"
Prof. Seokhyeong Kang (POSTECH, Korea)
16:45-17:00 Closing Ceremony
Prof. Yoshikazu Miyanaga (Chitose Institute of Science and Technology, Japan)
19:00-21:00 Workshop Dinner
at Aburi-Ya (Minami 5 Jo Nishi 3, Chuo-ku, Sapporo)
August 1 (tue)
10:00-12:00 Lab Tour at Hokkaido University14:00-17:00 Conference Site Inspection in Sapporo City
Committee members
Yoshikazu Miyanaga
General Chair
Yoshifumi Nishio
General Chair
Hiroshi Tsutsui
General Secretary
Yoko Uwate
General Secretary
Contact
For more information about Sapporo-CAS, please contact the committee.
Contact Address: uwate@ee.tokushima-u.ac.jp